This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No.11-246168, filed on Aug. 31, 1999; the entire contents of which are incorporated herein by reference.
The present invention relates to a variable length decoder for decoding a variable length code, and a video decoding apparatus such as an MPEG decoder using the variable length decoder.
The MPEG mode (Moving Picture Experts Group), which is an international standard of video compression, has been standardized, and video encoding apparatus (MPEG encoder) and video decoding apparatus (MPEG decoder), which operate on the MPEG mode are used widely in practice in storage systems or transmission systems of DVD systems.
In an MPEG decoder, a video signal is encoded by taking motion compensation adaptive prediction, discrete cosine transformation (DCT) and variable length coding in combination. A predictive mode has mainly an intra-frame predictive mode and an inter-frame predictive mode. A predictive error signal corresponding to the difference between a prediction signal (the prediction signal=0 in an intra-frame predictive mode) and an input video signal is converted into DCT coefficients by a discrete cosine transformer.
The DCT coefficients are quantized by a quantizer, and then they are variable-length-encoded by a variable length encoder. Further, header information items such as a motion vector, a predictive mode, a quantization step size and micro-block type, which are used in motion compensation adaptive prediction, are also encoded by the variable length encoder. The variable length codes from the variable length encoder are multiplexed and then outputted as a coded bit stream from the MPEG encoder.
The coded bit stream outputted from the MPEG encoder is inputted to the MPEG decoder via a storage medium and a transmission line. In the MPEG decoder, the variable length code which has been multiplexed into the inputted coded bit stream, is decoded by the variable length decoder, such as to generate a quantized DCT coefficient and header information. The quantized DCT coefficient is dequantized, and then inverse-DC-transformed by an inverse discrete cosine transformer to be transformed back to a predictive error signal. A predictive signal is generated from the predictive error signal, and an image signal is reconstructed from the predictive signal.
Here, it should be noted that in the variable length decoder, decoding is performed with use of a variable length code table in which quantized DCT coefficients and header information items are treated as information symbols and these information symbols and variable length codes are associated with each other.
In a conventional variable length decoder, a variable length code table unit includes the first table group including the (n+1)-number of tables and the second table group including the (m+1)-number of tables. Here, the entire bits (I bit) of reference data including variable length codes are commonly input to all tables of the variable length code table unit, and information symbols associated with the variable length codes inputted are outputted from the variable length code table unit. Then, an output (N bits) of one table is selected by a selector of (n+m+2):1, provided in a later stage than the tables, in accordance with table selection data, and thus variable length decode data is obtained.
With the above-described structure, if the number of tables (n+m+2) in the variable length code table is increased, the size of the selector MUX becomes larger in scale. Accordingly, the circuit scale of the entire variable length decoder becomes larger, which causes a decrease in its operation frequency.
In another example of the conventional variable length decoders, a variable length code table unit includes the first table group and the second table group. Here, reference data (I bits) and table designation data (J bits) are commonly input to all tables of the first and second table groups of the variable length code table unit, and information symbols associated with the inputted variable length codes are outputted as variable length decode data from one table designated by the table designation data.
In the case of this structure, unlike the before-described conventional example, there is no need to provide a large-scale selector in a later stage than the variable length code table unit; however if the number of tables of the variable length code table unit becomes large, the bit width J of the table designation data increases as well. As a result, the input bit width of the table is increased, and consequently the circuit scale is enlarged, thus decreasing the operation frequency.
As described above, in the conventional variable length decoders, a large-scale selector is required on an output side of the variable length code table or the input bit width of the variable length code table is increased. Consequently, they entail such a problem of increasing the entire circuit scale, which results in a decrease in the operation frequency.
The object of the present invention is to provide a variable length decoder having a small circuit scale and capable of high-speed operation, and a video decoding apparatus which uses the variable length decoder.
According to the present invention, there is provided a variable length decoder including: a variable length code table unit configured to store a plurality of information symbols corresponding to a plurality of variable length codes, respectively, the variable length code table unit including at least a first table group of tables storing first variable length codes and a second table group of tables storing second variable length codes that are smaller than the first variable length codes in the number of codes and in code length, the tables of the second table group being larger in number than those of the first table group; and an input unit configured to input reference data and table designation data to the variable length code table unit with entire bits of the reference data and part of the bits of the table designation data being input to the first table group to output a first information symbol corresponding to the reference data from one table selected by the part of the bits of the table designation data, and part of the bits of the reference data and entire bits of the table designation data being input to the second table group to output a second information symbol corresponding to the part of bits of the reference data from one table selected by the entire bits of the table designation data.
As explained above, in the present invention, the bit width of the reference data to be inputted to each table group of the variable length code table unit is varied. With this structure, a large-scale selector is not required on an output side of the variable code table unit, or the input bit width of the variable length code table unit does not become excessively large. Therefore, it becomes possible to realize a variable length decoder capable of a high-speed operation in a small circuit scale.
Further, according to the preset invention, there is provided a video decoding apparatus which decodes a variable length code of a coded bit stream obtained by encoding a video signal, with use of the above-described variable length decoder.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.